Projects

I analyze, design, and develop security frameworks for semiconductors embedded in various cyber-physical, and electronics systems, enabling an assured and trusted microelectronics ecosystem. In my research I have proposed, introduced and developed novel, inter-disciplinary techniques in the hardware security domain.

The advancements in the field of electronic systems have left humanity contemplating how to push this already advanced sphere to new heights of modernization. However, as we strive for progress, it is crucial to prioritize the security of these systems, given the increasing sophistication of attacks they face. Against this backdrop, my research interests lie in the area of "Hardware Security" or "Assured and Trusted Microelectronics," a rapidly evolving field. My research agenda specifically focuses hardware security and trust (focusing on semiconductor supply chains, and security solutions at the design level such as obfuscation, watermarking, etc.), hardware security primitives, blockchain and zero trust for assured and trusted semiconductors, fault injection and side channel attacks and assessments. My interests further extends to investigating security solutions for battery systems, space electronics, smart grids, and photonic ICs.

Hardware Security is a field that has recently gained immense recognition and seen significant advancements. However, the techniques developed thus far remain conventional, while vulnerabilities continue to grow in sophistication. As a hardware security researcher, I focus on interdisciplinary solutions that introduce enhanced complexity, making it more challenging for adversaries to exploit. I emphasize foolproof solutions that cover a broad attack vector and, ultimately, a wider attack surface. For instance, my Ph.D. dissertation presents a novel zero trust architecture enabled by blockchain technology and hardware oriented security primitives like physical unclonable functions for securing the semiconductor supply chain. Specifically, my dissertation addresses the prevention and detection of counterfeited, Trojan-intruded, and recycled semiconductors, including ASICs and FPGAs. Furthermore, I aim to expand my research to areas closely related to microelectronics security, such as battery security, space electronics security, and smart grid security. By systematically harnessing and innovating a diverse array of tools, my research serves as a blueprint for holistic microelectronics security solutions for modern applications.

My overarching vision is to empower individuals with security solutions that (1) explore the fundamental limitations of existing approaches, rethink the status-quo and provide fresh theoretical insights into quantifying security and assurance, and (2) deliver functionally rich systems that are not only provably secure and assured but also tailored to meet application specific constraints, ensuring their seamless deployment in the real-world. In my Ph.D. work, I systematically built a security framework from the ground up. During my postdoctorate, I have delved into foundational questions concerning specific attack scenarios on hardware systems. Furthermore, I have also widened the scope of my research to closely related domains to microelectronics security. As such, my expertise spans a wide spectrum of areas, including security at various levels ranging from design to after-life and additional domains as well. My research encompasses both theoretical advancements and development of practical systems, fully equipping me to bring my vision to fruition.

My previous and current research investigates integration of security paradigms like blockchain technology, zero trust architecture and zero knowledge proofs in the hardware security domain. My experiments prove the successful implementation of external security paradigms in the hardware security domain. Additionally, the research projects that I overlook currently have been proposed by me as a part of my job. These projects have made immense contribution to the hardware security field. Moreover, the projects introduced by me are proving to be beneficial in fields having significant influence of microelectronics. A summary of my previous research and future research plans is summed up in this research statement.

Prior and Current Research

Semiconductor Supply Chain Security enabled by Blockchain Technology

This project introduces the implementation and execution of blockchain technology in the securing and maintaining integrity of the semiconductor supply chain. This work has been published in an esteemed IEEE conference, NAECON [1].

A Trusted Semiconductor Supply Chain using Blockchain Technology and Hardware Security

Enhancing the previous work [1], in this work Physical Unclonable Functions (PUFs) in combination with blockchain technology are utilized to secure the semiconductor supply chain. With this technique, a user can not only determine the authenticity of the FPGA but can also identify the guilty party in the supply chain responsible for the untrustful act [2].

A Zero Trust Architecture for Microelectronics security

My previous research endeavors focus on the use of hardware security primitives and blockchain for microelectronics supply chain. This investigation goes a step ahead by proposing a Zero Trust Architecture for the security of semiconductor supply chain. This research, for the first time, brought together two security principles (blockchain and PUFs) to realize a third security concept (Zero Trust). This work has been published as a research article in the IEEE Access journal [3]. An extension of this work is also applied to the security of AMI, and IoT [4], [5].

A more enhanced zero trust model [6] to combat the vulnerabilities, on microelectronics, is developed which assigns trust scores to various attributes of the network and grants access based on dynamic policies that evaluate these scores.

Security of Battery systems

This project investigates battery authenticity and discussing practical concerns such as rewrapping and recycling in-depth at each stage of supply chain. As for battery assurance, we consider emerging attack vectors like counterfeiting, Trojan intrusions, side channel attacks, fault injection attacks, etc. that can compromise the confidentiality, integrity, and availability of the microelectronic BMS. Moreover, promising countermeasures regarding the detection and avoidance of threats on both battery authenticity and assurance are being researched, such that researchers will gain insights into how the problem could be addressed/alleviated [7].

Sensor for Fault Injection Detection and Prevention

This research introduces a universal solution for efficiently detecting prominent FIAs using a lightweight on-chip delay-based fault-to-time converter (FTC) sensor. The sensor functions by translating the consequences of fault attacks into measurable “time” differentials [8].

Hardware Trojan detection using Machine Learning

This work presents a technique for the efficient detection of hardware Trojans within ICs, leveraging both power side channel analysis and machine learning (ML) algorithms .The framework proposed in this investigation measures the variations in the power consumption of a ring oscillator physical unclonable function (ROPUF) and trains the collected dataset to execute the ML algorithms [9]. 

Attack-Resilient Semiconductor Manufacturing Process 

This research proposes to implement blockchain technology at the mask writing step of photolithography, to prevent doctoring of the design GDSII file and, a trojan-free circuit being printed on the silicon wafer eventually producing a desirable chip [10].

Using Protection of Hardware IP by enhancing and modifying conventional techniques

Leveraging the traditional countermeasure of watermarking, we introduce PSC-WM as an innovative technique for authenticating IPs through the power side-channel characteristic using clock gates. PSC-WM seamlessly incorporates a power signature with minimal alterations to the IP core.

Another project I am a part of is exploring the feasibility of using machine learning algorithms to discern between actual and spurious wires, enabling the identification of potential security vulnerabilities and the mitigation of risks associated with malicious modifications.

A published work of mine in this area introduces a novel technique of the design file (GDSII) transfer for hardware IP protection by converting the file as a non-fungible token (NFT) [11].

Future Research Plans

Generative AI based zero touch security for trusted and assured microelectronics

With the recent advantages of Machine Learning and Artificial Intelligence and its enhancement to Generative AI, they can be leveraged into security of cyber-physical, electronics, battery, space electronics and embedded systems. Exploiting ML to detect faults and attacks in the system and ultimately utilizing the power of GenAI to repair the fault injected/occurred due to the attack, leading to an automated security mechanism from detecting an attack to fixing the system, without human intervention. Such a mechanism can be applicable to various distinct systems. 

An ML and Fuzzy Logic enhanced ZTA for Assured and Trusted Microelectronics

Extending my work in the area of Zero Trust for Microelectronics, I intend to design and develop an improved Zero Trust Architecture based to trust-scores. Upgrading my previous model which ensures that access to the network is granted only when the total trust score exceeds a predetermined threshold, I postulate using ML algorithms and/or Fuzzy Logic for calculating the trust scores and deciding the status of access seeker. This work would ensure a complete "Zero Trust" as the human interference of even computing the trust scores would be eliminated.  Additionally, a fair decision on granting or denying access to the network, considering 'margin of error' would also be taken into regard. Eventually, this work would produce an automated zero trust architecture, free of any human intervention. 

Cyber-physical based hardware security in space electronics 

Electronics are the most important component of a space mission. While these components are crucial for various functions and operations, in the space, their security is an untouched area. Interception of an attacker in critical communication systems like military aviation or even commercial aviation, is a danger to national security. With this view, space electronics security projects are projects I wish to work on. Particularly, countermeasures against malicious activities on electronics in satellite and auxiliary components is a research area that I am enthusiastic to investigate 

Unique Identifier for Battery Systems

Continuing my current research in the field of battery systems security, a very significant area of consideration is security of battery supply chain. With the ever increasing utilization of batteries, attacks on batteries, especially counterfeiting is inevitable. Developing unique identifiers/fingerprints for battery packs is a solution that can be significantly investigated to counter attacks on battery packs and eventually battery powered systems. 

Implementation and Execution of Zero-Knowledge Proofs (ZKPs) for Hardware Security

Considerable research has been conducted in the Assured and Trusted Microelectronics field. However, with the sophistication of the attacks, a new dimension of security is required for the security of hardware. Zero Knowledge Proof is a cryptographic concept that helps a party to convince another, the validity of a statement without actually giving out the statement or any contents of the statement. The conjunction of zero knowledge proofs and blockchain would prove to be a critical security measure for the security of microelectronics. 

Union of management concepts like Lean Six Sigma, Kaizen etc., with Blockchain for Security of Microelectronics

Interdisciplinary research is what interests me a lot, and with this excitement, I have been closely following various concepts from different fields to introduce them into the hardware security domain. As hardware security area requires constant evolution due to the evolution of the attacks, application of concepts from other areas would prove to be vital. With this background, my future plans for research would be collaboration with the management field to utilize concepts like lean six sigma and kaizen into the hardware security domain. The lean six sigma methodology of Define-Measure- Analyze-Improve-Control (DMAIC) and Define-Measure-Analyze-Design-Verify (DMADV), and the concept of continuous improvement provided by Kaizen, would be a cutting-edge research area. 

References:

[1] A. Kulkarni, N. A. Hazari, Mohammed Niamat, “A Blockchain Technology Approach for the Security and Trust of   the IC Supply Chain”, 2019 IEEE National Aerospace and Electronics Conference (NAECON), 2019, pp. 249-252, doi: 10.1109/NAECON46414.2019.9058027. 

[2] A. Kulkarni, N. A. Hazari, & M. Niamat, "Ring Oscillator PUF and Blockchain : A way of securing Post-Fabrication FPGA Supply Chain", 2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS), Tempe, AZ, USA, 2023, pp. 35-39, doi: 10.1109/MWSCAS57524.2023.10405953. 

[3] A. Kulkarni, N. A. Hazari, and M. Niamat, "A Zero Trust-based framework employed by Blockchain Technology and Ring Oscillator Physical Unclonable Functions for security of Field Programmable Gate Array," in IEEE Access, vol. 12, pp. 89322-89338, 2024, doi: 10.1109/ACCESS.2024.3418572. 

[4] A. Kulkarni, A. Niroula, H. Bhattarai, and M. Niamat, "A Zero Trust Architecture employing Blockchain and Ring Oscillator Physical Unclonable Functions for Internet-of-Things," 2024 IEEE International Conference on Electro Information Technology (eIT), Eau Claire, WI, USA, 2024, pp. 508-513, doi: 10.1109/eIT60633.2024.10609880. 

[5] F. Alsulami, A. Kulkarni, N. A. Hazari, and M. Niamat, "ZEBRA : Zero Trust Architecture Employing Blockchain Technology and ROPUF for AMI Security," in IEEE Access, 2024, doi: 10.1109/ACCESS.2024.3449702 

[6] H. Bhattarai, A. Kulkarni, and M. Niamat, "Trust Score-based Zero Trust Architecture for Advanced Metering Infrastructure Security," (Paper under publication: IEEE NAECON’24). 

[7] T. Zhang, S. Shi, M. H. Rahman, N. Varshney, A. Kulkarni, F. Farahmandi, & M. Tehranipoor, "INSPECT: Investigating Supply Chain and Cyber-Physical Security of Battery Systems," 2024 eprint.iacr.org/2024/211. Available: https://ia.cr/2024/211 

[8] M. R. Muttaki, M. H. Rahman, A. Kulkarni, M. Tehranipoor and F. Farahmandi, "FTC: A Universal Framework for Fault-Injection Attack Detection and Prevention," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, doi: 10.1109/TVLSI.2024.3384531. 

[9] M. Saraf, T. Syed, A. Kulkarni, and M. Niamat, "Hardware Trojan detection employing Machine Learning, Physical Unclonable Functions, and Side Channel Analysis," 2024 IEEE International Conference on Electro Information Technology (eIT), Eau Claire, WI, USA, 2024, pp. 514-519, doi: 10.1109/eIT60633.2024.10609912. 

[10] A. Kulkarni, N. A. Hazari and M. Niamat, "Towards Blockchain-enabled Mask Writing for Security against Hardware Trojan Intrusion," 2023 IEEE International Conference on Electro Information Technology (eIT), Romeoville, IL, USA, 2023, pp. 436-441, doi: 10.1109/eIT57321.2023.10187268.

[11] A. Kulkarni, H. Bhattrai, T. Syed, M. Niamat, "Non-Fungible Tokens (NFTs) for Hardware IP Protection," NAECON 2023 - IEEE National Aerospace and Electronics Conference, Dayton, OH, USA, 2023, pp. 187-191, doi: 10.1109/NAECON58068.2023.10365737.